BASYSREVEDEMO Project Status
Project File:	BasysRevEDemo.ise	Current State:	Programming File Generated
Module Name:	BasysRevEDemo	Errors:	No Errors
Target Device:	xc3s100e-5tq144	Warnings:	280 Warnings
Product Version:	ISE 8.2.02i	Updated:	Tue Dec 5 22:00:02 2006

 

Device Utilization Summary
Logic Utilization	Used	Available	Utilization	Note(s)
Total Number Slice Registers	622	1,920	32%
Number used as Flip Flops	587
Number used as Latches	35
Number of 4 input LUTs	1,450	1,920	75%
Logic Distribution
Number of occupied Slices	864	960	90%
Number of Slices containing only related logic	864	864	100%
Number of Slices containing unrelated logic	0	864	0%
Total Number 4 input LUTs	1,566	1,920	81%
Number used as logic	1,450
Number used as a route-thru	116
Number of bonded IOBs	46	108	42%
IOB Flip Flops	5
Number of GCLKs	7	24	29%
Number of DCMs	1	2	50%
Total equivalent gate count for design	23,203
Additional JTAG gate count for IOBs	2,208

 

Performance Summary
Final Timing Score:	37910	Pinout Data:	Pinout Report
Routing Results:	All Signals Completely Routed	Clock Data:	Clock Report
Timing Constraints:	1 Failing Constraint

 

Detailed Reports
Report Name	Status	Generated	Errors	Warnings	Infos
Synthesis Report	Current	Tue Dec 5 21:58:24 2006	0	251 Warnings	13 Infos
Translation Report	Current	Tue Dec 5 21:58:34 2006	0	0	9 Infos
Map Report	Current	Tue Dec 5 21:58:50 2006	0	17 Warnings	3 Infos
Place and Route Report	Current	Tue Dec 5 21:59:41 2006	0	2 Warnings	2 Infos
Static Timing Report	Current	Tue Dec 5 21:59:49 2006	0	0	2 Infos
Bitgen Report	Current	Tue Dec 5 22:00:01 2006	0	10 Warnings	0

 

Secondary Reports
Report Name	Status	Generated
Xplorer Report